The present invention is related to systems and methods for data processing, and more particularly to systems and methods for governing power usage in a data processing system.
Data processing circuits often include a data detector circuit and a data decoder circuit. A data set is typically processed first through the data detector circuit with the results thereof being processed through the data decoder circuit. In some cases, the data set is passed through both the data detector circuit and the data decoder circuit many times before a data output is available. This processes of data decoding and data detection can consume significant amounts of power that at times may exceed the capability of an existing power supply. Exceeding the limits of the power supply may result in an under-voltage condition and a corresponding increase in error rates of the data processing circuit.
Hence, for at least the aforementioned reasons, there exists a need in the art for advanced systems and methods for data processing.